Cyclic Redundancy Checks
Contents
A Cyclic Redundancy Check is a powerful error-detection coding.
A CRC check is performed in the Ethernet and 802.11 WiFi frame.
For a CRC-n
check, n+1
bits are used in the generator bit pattern G
.
TLDR
- Append
n
bits to the dataD
- Divide
D
withG
(align the first ‘1’, then XOR) Continue until the remainder is given
R == 0
- successful verificationR != 0
- data has been corrupted
http://www.sunshine2k.de/articles/coding/crc/understanding_crc.html
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 | Input data is the byte 0xC2 = b11000010. As generator polynomial (=divisor), let's use b100011101. The divisor has 9 bits (therefore this is a CRC-8 polynomial), so append 8 zero bits to the input pattern. Align the leading '1' of the divisor with the first '1' of the dividend and perform a step-by-step school-like division, using XOR operation for each bit: ABCDEFGHIJKLMNOP 1100001000000000 100011101 --------- 010011001 100011101 ---------- 000101111 100011101 (*) --------- 001100101 100011101 --------- 010001001 100011101 --------- 000001111 = 0x0F ABCDEFGHIJKLMNOP |